Various household appliances including televisions or refrigerators operate with commercial AC power received from outside. Electronic devices including notebook computers, mobile terminals, and tablet terminals are also operable with a commercial AC power, or batteries built into the devices may be charged with commercial AC power. Such household appliances or electronic devices (hereinafter, generally referred to as “electronic devices”) are equipped with a power supply (AC/DC converter) for AC/DC converting commercial AC voltage. Alternatively, an AC/DC converter may be incorporated in an external power adapter (AC adapter) of an electronic device.
FIG. 1 is a block diagram illustrating a basic configuration of an AC/DC converter 100r. The AC/DC converter 100r mainly includes a filter 102, a rectifying circuit 104, a smoothing capacitor 106, and a DC/DC converter 200r. 
A commercial AC voltage VAC is input to the filter 102 through a fuse and an input capacitor (not shown). The filter 102 removes noises from the commercial AC voltage VAC. The rectifying circuit 104 is a diode bridge circuit for full-wave rectifying the commercial AC voltage VAC. An output voltage from the rectifying circuit 102 is smoothed by the smoothing capacitor 106 and converted into a DC voltage VIN.
The insulating DC/DC converter 200r receives the DC voltage VIN at an input terminal P1, steps down the received DC voltage VIN, and supplies an output voltage VOUT stabilized to a target value to a load (not shown) connected to an output terminal P2.
The DC/DC converter 200r includes a primary side controller 202, a photocoupler 204, a feedback circuit 206, an output circuit 210, a synchronous rectifying controller 300r, and other circuit components. The output circuit 210 includes a transformer T1, a diode D1, an output capacitor C1, a switching transistor M1, and a synchronous rectifying transistor M2. The topology of the output circuit 210 is the same as that of a general synchronous rectifying flyback converter, and thus, a description thereof will be omitted.
As the switching transistor M1 connected to a primary winding W1 of the transformer t1 is switched, the input voltage VIN is stepped down to generate the output voltage VOUT. Further, the primary side controller 202 adjusts a switching duty ratio of the switching transistor M1.
The output voltage VOUT of the DC/DC converter 200r is divided by resistors R1 and R2. The feedback circuit 206, which includes, for example, a shunt regulator or an error amplifier, amplifies an error between the divided voltage (voltage detection signal) VS and a predetermined reference voltage VREF (not shown), generates an error current IERR corresponding to the error, and draws (sinks) the error current IERR from a light emitting element (light emitting diode (LED)) at an input side of the photocoupler 204.
A feedback current IFB corresponding to the error current IERR of a secondary side flows to a light receiving element (phototransistor) at an output side of the photocoupler 204. The feedback current IFB is smoothed by a resistor and a capacitor and input to a feedback (FB) terminal of the primary side controller 202. The primary side controller 202 adjusts a duty ratio of the switching transistor M1 based on a voltage (feedback voltage) VFB of the FB terminal.
The synchronous rectifying controller 300r switches the synchronous rectifying transistor M2 in synchronization with the switching of the switching transistor M1. More specifically, when the switching transistor M1 is turned off, the synchronous rectifying controller 300r turns on the synchronous rectifying transistor M2, and when a secondary current IS flowing through the secondary winding W2 during an ON period of the synchronous rectifying transistor M2 becomes substantially zero, the synchronous rectifying controller 300r turns off the synchronous rectifying transistor M2.
The overall configuration of the AC/DC converter 100r has been described above.
Next, the synchronous rectifying controller 300r will be described. FIG. 2 is a circuit diagram of the synchronous rectifying controller 300r reviewed by the present inventors. Further, the synchronous rectifying controller 300r of FIG. 2 should not be recognized as a known art.
The synchronous rectifying controller 300r has a drain sense (DRAIN) terminal, a gate output (GATE) terminal, and a ground (GND) terminal. The DRAIN terminal is connected to a drain of the synchronous rectifying transistor M2, and the GND terminal is grounded and commonly connected to a source of the synchronous rectifying transistor M2.
The synchronous rectifying controller 300r includes a first comparator CMP1, a second comparator CMP2, a first blanking circuit 312, a second blanking circuit 314, a first flip-flop FF1, and a driver 306. The first comparator (also called a “set comparator”) CMP1 compares a drain voltage (a voltage between the drain and the source) VD of the synchronous rectifying transistor M2 with a first negative threshold voltage VTH1 (for example, −100 mV), and when VD<VTH1, the first comparator CMP1 asserts a set signal S11 (for example, a high level). The set signal S11 is input to a set terminal of the first flip-flop FF1, and as the set signal S11 is asserted, an output (also called a control pulse) SCNT of the first flip-flop FF1 has a high level. The first blanking circuit 312 masks the set signal S11 during a predetermined blanking time TBLNK1 as the control pulse SCNT is changed.
The second comparator (also called a reset comparator) CMP2 compares the drain voltage (the voltage between the drain and the source) VD of the synchronous rectifying transistor M2 with a second negative threshold voltage VTH2 (for example, −3 mV), and when VH>VTH2, the second comparator CMP2 asserts the reset signal S12 (for example, a low level). The reset signal S12 is input to a reset terminal (negative logic) of the first flip-flop FF1, and the control pulse SCNT has a low level as the reset signal S12 is asserted (negative edge). The second blanking circuit 314 masks the reset signal S12 during a predetermined blanking time TBLNK2 as the control pulse SCNT is changed. The driver 306 switches the synchronous rectifying transistor M2 depending on the control pulse SCNT.
FIG. 3 is an operational waveform view of the synchronous rectifying controller 300r in a discontinuous mode. At a time t0, the switching transistor M1 is turned on. During an ON period TON1 of the switching transistor M1, a voltage across the secondary winding W2 is −VIN×NS/NP, and thus, the drain voltage VD (i.e., a voltage VDS between the drain and the source) of the synchronous rectifying transistor M2 is VD=VOUT+VIN×NS/NP. NP and NS denote the number of windings of the primary winding W1 and the secondary winding W2, respectively.
When the switching transistor M1 is turned off at a time t1, since the secondary current IS flows from the source of the synchronous rectifying transistor M2 to the drain thereof, the voltage between the drain and the source of the synchronous rectifying transistor M2 becomes a negative voltage. When the drain voltage VD is lower than the first negative threshold voltage VTH1 (for example, −100 mV) (time t1), the synchronous rectifying controller 300r immediately turns on the synchronous rectifying transistor M2 (time t2). During a delay of t1 to t2, the secondary current IS flows through a body diode of the synchronous rectifying transistor M2 and the drain voltage VD is −VF. VF is a forward voltage of the diode.
During an ON period TON2 of the synchronous rectifying transistor M2, the secondary current IS is reduced and an absolute value of the voltage VDS between the drain and the source is reduced according to a reduction in energy stored in the transformer t1. As a result, when the secondary current IS becomes substantially zero, the voltage VDS between the drain and the source also becomes substantially zero. When an ON resistance of the synchronous rectifying transistor M2 is RON2, the drain voltage VD during the ON period TON2 is −IS×RON2.
When the drain voltage VD exceeds the second negative threshold voltage VTH2 (for example, −3 mV) (time t3), the synchronous rectifying controller 300r immediately turns off the synchronous rectifying transistor M2. When the secondary current IS becomes zero at a time t4, the drain voltage VD is ringing. Thereafter, the switching transistor M1 is turned on again at a time t5.
When the drain voltage VD exceeds the first threshold voltage VTH1 at the time t4, the set signal S11 is asserted. However, since the set signal S11 is masked by the first blanking circuit 312, the synchronous rectifying transistor M2 is prevented from being turned on.
The present inventors reviewed the DC/DC converter 200r of FIG. 1 and reached the recognition of the following problems. Regarding the ON resistance RON2 of the synchronous rectifying transistor M2, when the ON resistance RON2 is small in variations thereof, the synchronous rectifying transistor M2 is turned on twice, causing malfunction. This problem will be described in detail below.
FIG. 4 is an operational waveform view of the synchronous rectifying controller 300r when the ON resistance RON2 of the synchronous rectifying transistor M2 is small. The drain voltage VD when the ON resistance RON2 is small is indicated by the solid line (i), and the drain voltage VD when the ON resistance RON2 is large is indicated by the alternate long and short dash line (ii) for comparison. A slope of the drain voltage VD during the ON period of the synchronous rectifying transistor M2 is in proportion to the ON resistance RON2. When the threshold voltage VTH2 is constant, the timing t3 at which the reset signal S12 is asserted is shifted ahead as the ON resistance RON2 is smaller and the blanking period TBLANK1 of the first blanking circuit 312 is shifted ahead. As a result, a portion of the second assert section of the set signal S11 is generated later than the blanking period TBLANK1, and accordingly, the synchronous rectifying transistor M2 is turned on again at the time t4, causing malfunction.
Thus, in the synchronous rectifying controller 300r of FIG. 2, the synchronous rectifying transistor M2 is turned on a plurality of times within one period in an application in which the ON resistance RON2 of the synchronous rectifying transistor M2 is small. This is undesirable because it means an increase in switching loss in a light load state, and further, a degradation of efficiency.